Thursday, June 13, 2002, 2:00 PM - 4:00 PM | Room: 287 SESSION 50    Moving Towards More Effective Validation    Chair: Magdy Abadir - Motorola, Inc., Austin, TX    Organizers: Carl Pixley, Masahiro Fujita    Designs are becoming more and more complex and thus in order to achieve high functional quality functional validation must become more effective. In this session, several successful approaches are presented towards this end: using formal specification to drive test-generation and coverage, Coverage hole analysis, Simulation-based sequential ATPG and direct/pseudo-random testing and formal verification.      50.1 Deriving a Simulation Input Generator and a Coverage Metric From a Formal Specification    Speaker(s): Kanna Shimizu - Stanford Univ., Stanford, CA    Author(s): Kanna Shimizu - Stanford Univ., Stanford, CA David L. Dill - Stanford Univ., Stanford, CA      50.2 Hole Analysis for Functional Coverage Data    Speaker(s): Avi Ziv - IBM Haifa Research Lab., Haifa, Israel    Author(s): Eitan Marcus - IBM Haifa Research Lab., Haifa, Israel Shmuel Ur - IBM Haifa Research Lab., Haifa, Israel Avi Ziv - IBM Haifa Research Lab., Haifa, Israel Oded Lachish - IBM Haifa Research Lab.,      50.3 Effective Safety Property Checking Using Simulation-Based Sequential ATPG    Speaker(s): Shuo Sheng - Rutgers Univ., Piscataway, NJ    Author(s): Shuo Sheng - Rutgers Univ., Piscataway, NJ Koichiro Takayama - Fujitsu Labs. Inc., Sunnyvale, CA Michael S. Hsiao - Virginia Tech., Blacksburg, VA      50.4 A Comaprison of Three Verificationn Techniques: Directed Testing, Pseudo-Random Testing and Property Checking    Speaker(s): Tim Blackmore - Infineon Tech., Bristol , Great Britain    Author(s): Mike G. Bartley - Infineon Tech., Bristol , Great Britain Darren Galpin - Infineon Tech., Bristol, Great Britain Tim Blackmore - Infineon Tech., Bristol, Great Britain